Business Wire

MathWorks Speeds FPGA and ASIC Verification with Universal Verification Methodology (UVM) Support

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced that HDL Verifier provides support for the Universal Verification Methodology (UVM) starting with Release 2019b, which is currently available.
EDN

Timing-driven Simulink FPGA synthesis

Simulink is popular among DSP designers, and FPGA vendors have taken note. These vendors have created blockset libraries that enable Simulink designs to be synthesized to an FPGA implementation. While ...
EDN

FPGA design and verification using Simulink

Xilinx System Generator for DSP is a MATLAB Simulink block set that facilitates system design. Targeting Xilinx FPGAs within the familiar MATLAB environment, System Generator for DSP gives you the ...
New Electronics

First integrated FPGA-in-the-loop workflow for PolarFire and SmartFusion2 FPGA development boards

Microsemi has announced a collaboration with MathWorks to launch hardware support for field programmable gate array (FPGA)-in-the-loop (FIL) verification workflow with Microsemi FPGA development ...
Semiconductor Engineering

Trends In FPGA Verification Effort And Adoption: The 2018 Wilson Research Group Functional Verification Study

As contributors and pioneers in the digital revolution, we are often so busy creating and innovating that we are compelled to focus on the trees, never mind the forest. But as we are all aware, the ...
Hackaday

MATLAB And Simulink For Zynq

Although we see a lot of MATLAB use in industry and in academia, it isn’t as popular in the hacker community. That’s probably due to the cost. If you’ve ever wondered why companies will pay over $2000 ...
Semiconductor Engineering

A Better Path From Simulink To RTL With Catapult HLS

Design teams working on ASIC or FPGA projects often start with algorithm exploration using MATLAB in order to prove out the mathematical behavior of the functional blocks at a high level of ...
Electronic Design

PCs Bridge The Gap Between DSP And FPGA Designers

Typically, DSP designers are unfamiliar with FPGA design tools, and FPGA designers are unfamiliar with DSP algorithms. But when Sandia National Laboratories needed to replace an analog implementation ...
Design-Reuse

Microsemi Collaborates with MathWorks to Deliver First Integrated FPGA-in-the-Loop Workflow for PolarFire and SmartFusion2 FPGA Development Boards

ALISO VIEJO, Calif. -- April 19, 2018-- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today ...